Controlling the use and distribution of intellectual property (hereinafter IP) through the electronic circuit design flow has become a greater concern for the IP providers when sharing the designs, especially in cases involving interoperable electronic circuit design databases and methodologies such as OpenAccess coordinated by the OpenAccess Coalition of the electronic design automation (hereinafter EDA) industry. In order to achieve interoperability, many electronic circuit design databases expose all the details of a design to a third party that may reuse and even modify the designs, including the intellectual property whose levels of details the provider of the IP would like to control to minimize undesired use or distribution of the IP.
The problem of protecting IP persists regardless of whether the electronic circuit design exhibits a flat or hierarchical nature. For example, when sharing a hierarchical IP block design, each sub-block in each hierarchy may carry individual value on which the IP provider of the hierarchical IP block design may wish to capitalize individually. For instance, a user that licenses to use but otherwise not to exploit, modify, or edit the details of the IP block may be entitled to access the top level but not any additional details of the IP block design.
Some conventional approaches create separate designs for the same IP block and transmit or instantiate different designs based on different access levels of different users. Some approaches also encrypt various IP designs hoping to deter undesired or unauthorized access to the IP designs for interoperability among different EDA tools. These encryption approaches do not, however, protect the IP designs from the specific EDA tools on which the encryption modules reside. For example, such encryption processes or modules may prevent other EDA tools from gaining unauthorized access to the IP designs but do not prevent the EDA tools on which the IP designs are created from accessing the IP designs.
Therefore, there exists a need for a more secure protection of IP in electronic circuit designs.